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feat: re-profile 22 emulators, refactor validation to common.py

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batch re-profiled nekop2 through pokemini. mupen64plus renamed to
mupen64plus_next. new profiles: nes, mupen64plus_next.
validation functions (_build_validation_index, check_file_validation)
consolidated in common.py — single source of truth for verify.py
and generate_pack.py. pipeline 100% consistent on all 6 platforms.
This commit is contained in:
Abdessamad Derraz
2026-03-24 22:31:22 +01:00
parent 94000bdaef
commit 0543165ed2
33 changed files with 1449 additions and 783 deletions
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37
emulators/oberon.yml
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@@ -1,9 +1,10 @@
emulator: Oberon
type: libretro
core_classification: community_fork
source: "https://github.com/libretro/oberon-risc-emu"
profiled_date: "2026-03-18"
upstream: "https://github.com/pdewacht/oberon-risc-emu"
profiled_date: "2026-03-24"
core_version: "2020-07-01"
display_name: "Project Oberon RISC"
display_name: "Oberon RISC Emulator"
cores:
- oberon
@@ -11,33 +12,15 @@ systems: [oberon]
# Project Oberon RISC emulator by Peter De Wachter.
# Emulates the Oberon RISC processor designed by Niklaus Wirth.
# The bootloader (512 words) is compiled into the binary from risc-boot.inc,
# loaded into ROM at 0xFFFFF800 on startup (risc.c:75-77, risc_new).
#
# Content: .dsk disk images containing the full Oberon operating system.
# The disk image is loaded via retro_load_game(game->path) and attached
# as SPI disk (Libretro/libretro.c:209-214). No files are read from
# the RetroArch system directory.
#
# Reference disk images ship in the repo under DiskImage/:
# Oberon-2020-08-18.dsk (990208 bytes, latest)
# Oberon-2019-01-21.dsk (988160 bytes)
# Oberon-2016-08-02.dsk (989184 bytes)
# Oberon-2016-04-18.dsk (989184 bytes)
# These are game content, not system files.
# Bootloader (512 words) compiled into the binary from risc-boot.inc,
# loaded into ROM at 0xFFFFF800 on startup (risc.c:75-77,93).
# No retro_get_system_directory() call — no files from system dir.
# Content: .dsk disk images loaded via retro_load_game (libretro.c:209-214).
# Upstream and libretro core emulation code (risc.c, disk.c) are identical.
files: []
notes:
architecture: >
Custom 32-bit RISC CPU (25 MHz emulated) with 1 MB RAM (expandable to 32 MB).
Monochrome 1-bit framebuffer. Keyboard input via PS/2 scancodes.
SPI bus for SD card (disk image) access. Serial port for PCLink file transfer.
boot_process: >
CPU starts execution at ROM address 0xFFFFF800. The embedded bootloader
reads the boot sector from the SPI disk and loads the Oberon inner core
(modules Kernel, FileDir, Files, Modules) into RAM, then jumps to it.
content_format: >
Disk images (.dsk) are raw sector images read via 512-byte SPI commands.
The core detects filesystem-only images (magic 0x9B1EA38D at sector 0)
and adjusts the sector offset accordingly (disk.c:57-58).
Bootloader embedded in ROM reads boot sector from SPI disk, loads
Oberon inner core into RAM. Content is raw sector .dsk images.