mirror of
https://github.com/Abdess/retroarch_system.git
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94 lines
3.6 KiB
GLSL
94 lines
3.6 KiB
GLSL
// Based on the AMD FidelityFX Super Resolution 1.0 sample.
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// Copyright(c) 2021 Advanced Micro Devices, Inc.All rights reserved.
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// Permission is hereby granted, free of charge, to any person obtaining a copy
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// of this software and associated documentation files(the "Software"), to deal
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// in the Software without restriction, including without limitation the rights
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// to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
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// copies of the Software, and to permit persons to whom the Software is
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// furnished to do so, subject to the following conditions :
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// The above copyright notice and this permission notice shall be included in
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// all copies or substantial portions of the Software.
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// THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
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// IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
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// FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.IN NO EVENT SHALL THE
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// AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
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// LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
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// OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
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// THE SOFTWARE.
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// The #version line and FSR_PASS_EASU come from the backend, because FSR_EASU_F/FSR_RCAS_F are
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// preprocessor gates deciding which function bodies ffx_fsr1.h emits at all. Selecting the pass
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// with a specialization constant the way cas.glsl does would leave both calls unresolved.
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#define A_GPU 1
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#define A_GLSL 1
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// FSR needs the 2021 revision of the portability header; ffx_a.h in this directory is the 2019 one
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// that ffx_cas.h and the Metal backend are patched against, and must not be used here.
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#include "ffx_a_fsr1.h"
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// Both passes share this block so that one pipeline layout serves both. RCAS only reads Const0 and
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// Sample, but Sample sits at offset 64 regardless, so the host has to push all five vectors.
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layout(push_constant) uniform const_buffer
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{
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uvec4 Const0;
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uvec4 Const1;
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uvec4 Const2;
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uvec4 Const3;
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uvec4 Sample;
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};
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// EASU reads through textureGather, so unlike CAS this has to be a combined image sampler rather
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// than a plain sampled image.
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layout(set=0, binding=0) uniform sampler2D imgSrc;
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layout(set=0, binding=1, rgba8) uniform writeonly image2D imgDst;
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#if FSR_PASS_EASU
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#define FSR_EASU_F 1
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AF4 FsrEasuRF(AF2 p) { return textureGather(imgSrc, p, 0); }
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AF4 FsrEasuGF(AF2 p) { return textureGather(imgSrc, p, 1); }
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AF4 FsrEasuBF(AF2 p) { return textureGather(imgSrc, p, 2); }
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#else
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#define FSR_RCAS_F 1
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AF4 FsrRcasLoadF(ASU2 p) { return texelFetch(imgSrc, ASU2(p), 0); }
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// Our input is already linear and between 0 and 1, so nothing to transform. See ffx_fsr1.h
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void FsrRcasInputF(inout AF1 r, inout AF1 g, inout AF1 b) {}
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#endif
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#include "ffx_fsr1.h"
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void CurrFilter(AU2 pos)
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{
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AF3 c;
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#if FSR_PASS_EASU
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FsrEasuF(c, pos, Const0, Const1, Const2, Const3);
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#else
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FsrRcasF(c.r, c.g, c.b, pos, Const0);
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#endif
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// Sample.x selects AMD's gamma2 output path, which we never want - the host zeroes it. It is
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// read unconditionally, so a short push constant write would square the whole image.
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if (Sample.x == 1u)
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c *= c;
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imageStore(imgDst, ASU2(pos), AF4(c, 1.0));
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}
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layout(local_size_x=64) in;
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void main()
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{
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// Do remapping of local xy in workgroup for a more PS-like swizzle pattern.
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AU2 gxy = ARmp8x8(gl_LocalInvocationID.x)+AU2(gl_WorkGroupID.x<<4u,gl_WorkGroupID.y<<4u);
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CurrFilter(gxy);
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gxy.x += 8u;
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CurrFilter(gxy);
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gxy.y += 8u;
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CurrFilter(gxy);
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gxy.x -= 8u;
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CurrFilter(gxy);
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}
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